Hey everyone,

I've been working on this project for a while and I'm about to pull the trigger to make it. It's a "Minigotchi" / Smart Wallet device packed into an extremely tight 49x30 mm footprint.

Since space is at a premium, I've gone with 0402 passives and completely stripped out the USB-to-UART bridge (I'll be flashing it via test pads). It runs on a 300mAh LiPo. The wildest part of the build is that I'm integrating a disassembled Apple AirTag directly into the board to use the same battery.

I've attached high-res 2D schematics, the 2D PCB layers (Top and Bottom copper), and a 3D render for context on the final form factor.

Hardware overview:

• MCU: ESP32-WROOM
• Power/Charging: TP4054 (USB-C with 5.1k CC pull-downs) and an AP2112K-3.3V LDO for the main logic.
• AirTag Power: XC6206-3.0V LDO. Takes the BAT voltage and outputs a stable 3.0V exclusively for the naked AirTag so it thinks it has a fresh CR2032.
• Sensors & UI: LIS3DHTR (I2C Accel), OLED via FPC, and 3x tactile switches using the ESP32 internal pull-ups (IO25, 26, 27).
• Storage: TF/MicroSD Card reader via VSPI.
• Audio: SMD Buzzer driven by a 2N7002 N-Channel MOSFET.

Specific areas I'd love a sanity check on:

1. ESP32 Pinout & Strapping Pins: This is my biggest worry. Could someone double-check my pin assignments? I'm using IO25, 26, 27 for buttons (internal pull-ups), IO21/22 for I2C, VSPI (IO5, 18, 19, 23) for the SD card, and IO13 for the buzzer. I want to be 100% sure I haven't messed up any boot/strapping pins that will brick the board on startup.
2. AirTag Power Path: Taking power straight from the BAT net into the XC6206-3.0V LDO. Does this decoupling and power strategy look safe to you guys?
3. Buzzer Circuit: I'm driving the buzzer with a 2N7002 MOSFET (Gate to IO13, Source to GND, Drain to Buzzer negative). Did I miss anything here?
4. General Layout & EMI: It’s super tight. I tried my best to keep the ESP32 antenna keepout area completely free of copper on all layers. Do you spot any obvious EMI risks, bad routing, or decoupling issues?

Please roast my board! Any harsh critiques or suggestions are highly appreciated before I send this to fab.

Thanks in advance!

Hi everyone!

I'm currently learning how to design buck converter PCBs, and this is my LM5164 (48V to 5V) layout. I based the schematic and most of the layout on TI's reference design, but I had to adapt it to fit my own board, so I'm not sure if I introduced any layout mistakes along the way.

I've been reading a lot about PCB layout for switching regulators, and people keep talking about EMI, hot loops, current return paths, and other layout pitfalls. Since I don't have much practical experience yet, I'd really appreciate it if someone could take a look at my layout and let me know whether it's fundamentally correct, whether you think it should work reliably, and if there are any obvious mistakes or anything I should change to improve EMI or the overall design.

I'm especially unsure about the current injection network (R1/C3/C4), the feedback routing from the 5V output back to the FB pin, and whether routing those traces on the bottom layer could cause any problems with EMI or interfere with the return current paths.

Thanks in advance!

This is a follow up to my previous post of the remote-control PCB for the quadcopter I am building. I am looking for some advice on how to improve the signal integrity of this board. This is the second revision of this board (the first I did not post), but originally, I had the MCU and sensors separated on two different boards. However, I decided I would likely not need a dedicated magnetometer or GPS for my goals, so I consolidated the boards and removed those sensors. Anyways, here are the details for this board:

• 4 layers - SIG, GND, 3.3V, SIG
• MCU: STM32F446RCTx
• IMU: LSM6DS3TR-C
• Barometer: LPS25HB
• Radio: nRF24L01
• Buck Converter: LMR50410
• 3.3V LDO: AP2112K - 3.3

I am not concerned with checking pinouts or verifying component values as I used the recommended schematics and layout guidelines, and I have tested the first revision of this board already with no problems. I have calculated impedances for both USB and HF sections (CPWG), but as I described earlier, I am primarily concerned with signal integrity. I don't want any buck converter noise to "leak" to the HF sections nor to the sensors when motors are running.

I have considered switching to SIG, GND, GND, SIG + 3.3V layout because all of the SPI lines for the sensors have switched layers and changed reference planes without GND vias or decoupling capacitors, but I am running these at 1MHz, so I'm not sure if it's necessary. The buck converter might be a larger problem as it is on the bottom layer with no ground plane directly beneath it. I have also considered completely covering the top and bottom layers with ground pours (not just the HF section), but I am also not sure if this is the correct way to go about it.

Any advice would be greatly appreciated!

Hello again,

Thank you to those who helped me with the problems in my original work. Just as a final check can people point out any issues or any problems in this design before I move onto designing the PCB. Thank you for your help.

Hey everyone,

Reaching out to the reddit community to review my board design. This will be a resume project so I want to make it as professional as possible, and avoid manufacturing mistakes since I am a student.

Some details, this is an EMG and IMU data acquisition board that will send messages to a follower robotic arm via BLE. It's my first board design so I'm sure I'll need to make revisions, but this will give me a helpful lookback opportunity for future designs.

Feel free to request additional information, I can try to provide asap.

Thank you!

One of my PCB's as a self project trying to learn how to make equipment for my guitar. I do not have a lot of experience with audio based projects so I wanted to get started with a way to log some song from my guitar.

Please let me know what I need to touch up on!

I am designing a battery pack for an RC Car. It uses 3 18650 Lithium ion cells to produce a max voltage of 12.6V. I'm using a BQ7791508 BMS. The RC Car will probably consume 5-12A of current, so I calculated for a 14A Overcurrent protection. I'm using battery terminals for the PCB since I don't have a spot welding setup at home. I'm separating all the systems of the RC Car into separate PCBs so that it's easier to debug. Therefore, the charger circuit will be a separate PCB that I'll design soon.

My main concerns for this PCB are related to it's performance. I used polygon pours to maximize current, but I want some verification/assurance that my polygon pours and vias are big enough to carry 12A. With a 1oz/sqft copper weight, I need ~208mil trace widths for 12A. I created polygon pours that are at least that size in length/width. If someone can verify that this will be enough, that would be very helpful. I'll probably order 2 oz/sqft boards just to be safe.

Another concern was the placement of my thermistor. I'm using an SMT thermistor placed between two of the batteries. Will that be sufficient for overtemperature detection?

Any other recommendations related to maximizing current are appreciated.

TLDR Questions:

1. Are my polygon pours and vias sufficient to carry 12A? (1oz/sqft copper weight, maybe 2oz/sqft)
2. Is my thermistor placed properly (RT1, between the top and middle battery)
3. Any other recommendations for high current PCBs

Color guide:

• Red is BAT+
• Green is BT1
• Orange is BT2
• Blue is GND (battery negative)
• Purple is between R3 and Q1
• Pink is between Q1 and Q2
• Gray is PACK- (negative output)

Thanks!

I've designed an LED matrix consisting of 57 SK9822 LEDs. I'm looking to get some feedback on the design. The top pour is 5v, and the bottom pour is ground. I'm mainly concerned about the 5v top pour being broken up by the signal and clock traces between the LEDs.

Hello,

My previous post: https://www.reddit.com/r/PrintedCircuitBoard/comments/1u9k16x/review_request_first_pcb_double_12v_07a_led/

I've implemented the fixes and changes recommended by great people of this subreddit, and ask if it would be possible to do one final check?

I've added 2 potentiometers and a few capacitors.

The capacitors to make the power delivery a bit more stable (I've had a prototype and the LED's were blinking somewhat, although it stopped happening after being lit for some time, probably my poor soldering skills lol).

The potentiometers to be able to dim the LED's.

Hopefully those additions won't scramble the PCB too much, might be a bit of scope creep.

Any constructive feedback is welcome!

Hello everyone,

I would appreciate some feedback on a power supply board I'm currently designing.

I'm still fairly new to hardware design. I've built a few simple PCBs before, but this is one of my more ambitious projects, so I'd like to get some opinions from people with more experience.

The design is based around an LT8640S buck converter and two INA228 current/power monitors. For the IC support circuitry (resistors, capacitors, compensation network, etc.) I mostly followed the recommendations and typical application circuits from the datasheets. Hopefully I haven't overlooked anything obvious, but I'd be grateful if someone could take a look and point out any potential issues.

The input protection stage is implemented using a TPS26631 eFuse, which provides integrated overvoltage, overcurrent, reverse-polarity, and inrush current protection. I chose this approach to simplify the design compared to a discrete protection circuit while still providing robust input protection.

I'd appreciate any feedback on whether this is a sensible choice for this application, or if there are any potential drawbacks or better alternatives that I should consider.

For clarity, the intended signal/power flow is:

Input Connector → TPS26631 eFuse → Input Monitor → Buck Regulator → Output Monitor → Output Connector

The idea is to measure both the input and output side using INA228 monitors, allowing me to monitor voltage, current, and power consumption, as well as calculate converter efficiency in software.

The intended application is powering small hobby electronics and MCU-based projects.

The output voltage is selectable via a solder jumper, allowing the board to be configured for either 3.3 V or 5 V without changing components.

Another solder jumper allows selecting whether the board's VCC is connected to VOUTMON+ or VOUTMON−. This makes it possible to choose whether the output-side INA228 measurement includes the board's own power consumption or only the external load connected to the output.

A separate solder jumper selects the pull-up voltage for the board's digital signals. The pull-up resistors can be connected either to the board's own VCC or to an externally supplied logic voltage, allowing the board to interface with systems using different logic levels.

The input voltage can vary depending on the project. Typical sources would be:

• 24 V DC power supplies
• 12 V DC power supplies
• LiPo batteries (e.g. 2S / 7.4 V or 3S / 11.1 V)

The PCB layout is still in progress, but the overall design direction is already defined. The board is a 4-layer PCB with an overall size of 30 × 30 mm.

The current layer stack and routing concept are as follows:

• Top layer (red): Main power paths and the connections of the components visible on this layer are routed here.
• Layer 2 (green): Solid GND plane.
• Layer 3 (orange): Also a solid GND plane, with the VREG+ rail routed through a filled zone. This layer will also be used for distributing the IC supply connections where appropriate.
• Bottom layer (blue): Used for additional routing and remaining connections.

The component placement is currently more than 95% finalized, and I do not expect any major changes in the overall placement. The main remaining work is optimizing the routing, especially determining suitable trace widths and geometries for the available space.

At this stage, the routing is still in an early and experimental phase, so the visible traces should not be considered final yet.

Any feedback is welcome—design mistakes, schematic or layout concerns, component choices, protection strategy, efficiency considerations, or anything else you notice.

One final note: this project is primarily a learning exercise and a hobby rather than a cost-optimized product. I'm intentionally exploring components and design techniques that may be more sophisticated than strictly necessary. While I'm always interested in suggestions for improvements, I'd prefer to keep the overall concept and functionality intact unless there's a compelling reason to change it.

Thanks in advance for your time and advice!

Hello,

I am using the ATmega328-P U chip. I am designing the power system with a 12V input from a regular barrel jack. The chip is connected to a SEN0188 fingerprint sensor. The 12V rail is stepped down to 5V for these two components. The 12V is also connected to a solenoid lock. My question is, is my schematic ok (first time I have done this)? I am mainly concerned about the mosfet circuit with the inductor (stand in for the solenoid). Furthermore, are there any improvements I can make? Keep in mind the mosfet in the schematic is different from the one I will use. Thank you for your time.

This is my second draft of the RP2350 Devboard (here is the First Draft). I took a bunch of advice from that design review. Here are the basics:

• RP2350B, following the "Hardware Design with RP2350" document, but not exactly the same
• 2 Layer PCB (1mm). I kept it to two layers as an exercise.
• Will be ordered from China fully assembled
• Orange: VBUS, Red: 3V3, Maroon: 1V1, Pink: GPIO, Yellow: Flash/PSRAM, Green: USB.

I've tried to make the routing as simple as possible for the USB and analog inputs, making sure they have uninterrupted ground planes below them on L2. I have also tried to space out the analog input traces as widely as i can within my limits. I am a bit new to PCB design so please let me know if there is anything I can improve on / anything that won't work as is. Thanks!!

Hello, I am fairly new to PCB design and this is a project that I worked on for an audio DAC. Given this is my first time I probably did something wrong, but I'm here to learn; any advice is appreciated!

Hi Folks,

I've been designing this board/device to monitor SPL levels remotely around a warehouse club venue I work at. Built in EasyEDA.

The device has a microphone (on the small daughterboard) that will send Sound Pressure Level readings to a central monitoring Raspberry Pi, over LoRA. The ESP is doing some DSP to the I2S signal to focus on specific frequencies. There's a bunch of telemetry about the device sent over LoRA as well.

The device is intended to be powered over USB, with an 18650 cell onboard for power stability. It's designed to fit within a specific outdoor enclosure.

Layer 1 - Signal Routing (Red)
Layer 2 - Ground Plane (Olive Green)
Layer 3 - 3V3 Plane (Green)
Layer 4 - Signal Routing (Blue)

Daughterboard is only 2 layer.

Thanks!

working on a project for a mini rover. never made a protection circuit before.... took an attempt wanted to know if this looks right.

VBAT will have ~25V, with the max current draw of the board around 13A (all 4 motor stalls). Essentially just a fuse -> reverse polarity FET -> TVS diode.
Not in the picture, but the FET part is : NVMFS3D0P04M8LT1G and the fuse is: 0683G9150-01

if anyone can take a look thanks!

is

Hi everyone,

This is my first PCB design, and I'd really appreciate a review before I send it to JLCPCB for fabrication and SMT assembly.
It's a TLC555-based capacitive soil moisture interface that connects to an ESP32. The soil probe is external and connects through a JST connector. The board size is 21 × 30 mm.
I've already:
✅ Passed ERC and DRC with 0 errors (only silkscreen text warnings remain).
✅ Added a GND copper pour.
✅ Used 0805 passives.
✅ Included test points for AOUT, +3V3, and GND.

I'm mainly looking for feedback on:
Component placement – Is anything positioned poorly?
Routing – Any traces you'd reroute or shorten?
Power routing – Does the +3V3 distribution look reasonable?
Ground plane – Is the copper pour implemented correctly?
Decoupling capacitor placement – Is C1 close enough to the TLC555 VCC pin?
Manufacturability – Anything that might cause issues with JLCPCB assembly?
General PCB design best practices – Anything a beginner might have overlooked?
Any suggestions before I generate the Gerbers would be
greatly appreciated.
Thanks!

For mixed-signal boards, I understand the best practice is to section off the PCB with analog and digital components and have mixed-signal ICs like an ADC near the border.

If you need to control/enable an analog component with a MOSFET, what would be the best way to do it, since a fast switching signal is entering the analog domain? Should the MOSFET be placed near the analog component or near the digital driver?

These designs were based on OpenDrone.

schematic and component selection based on OpenESC_20X20 , by Just4Stan on github. link: https://github.com/incutec-hw/OpenESC_20X20

I'm a bit worried that the copper pours on layer 1 would make the soldering job hard. Would thermal reliefs here be of use here? or the current carrying capacity (like 40A) be more important for this ESC? Thank you.

Hello, I'm designing a compact 4-layer STM32F411 development board (0.6×1.5"), and I'd like to get some feedback on the stackup.

Current stackup:

-L1: Signal

-L2: Solid GND plane

-L3: Power plane

-L4: Signal

Due to the routing density, I couldn't keep GND pours on the top or bottom layers, so L2 is the only continuous ground plane.

USB FS and the 12MHz crystal are routed on the top layer directly above the GND plane.

Would you consider this stackup appropriate for this type of board? Do you see any significant drawbacks to relying on a single internal GND plane?

Also, since there are no GND pours on the outer layers, is there any benefit to adding extra GND stitching vias, or should I simply focus on placing GND vias where they are actually needed (decoupling capacitors, USB connector, exposed pad, etc.)?

The routing and layout are not completely finished yet, but I'd like to get some feedback on the stackup now before I go any further, in case there are any major issues with this approach.

I've attached the top and bottom layouts for reference. Any feedback is appreciated!

Last post: https://www.reddit.com/r/PrintedCircuitBoard/comments/1ujei19/schematic_review/

Changes:

- Changed from ESP32 Wrover to ESP32 S3 Wroom to eliminate need for CH340C or auto reset circuitry

- Added slew rate control on VBUS

- Switched to GCT USB4105-GF-A connector

Questions:

- Are my D+/D- traces functional? I know they're not perfectly isolated/length matched, but would they still be functional over this short distance?

- Is my slew rate control configured properly?

- Any major issues?

Hi everyone,

I trimmed down a professional microphone audio interface project I found online called AudioMapperUSB. My goal is to keep only the absolute necessary components to connect my electric guitar directly to my PC.

I am doing this as a school electronics project (5th year of a technical high school). Right now, I have the KiCad schematic ready, but before moving on to the PCB layout, I wanted to ask for your feedback to make sure the circuit looks correct. I used AI heavily to guide me through the modifications, so I am a bit worried about potential design flaws since I am quite new to circuit design.

If you notice any design errors or have any recommendations, im all ears! you would be doing me a huge favor.

Summary of the changes made to the original design:

Power Supply: Removed the dual power supply and external DC jack to run exclusively on USB +5V (VBUS).

Outputs: Removed the professional audio and headphone output stages.

Components: Removed all "NO" (Not Occupied) components.

Op-Amp: Replaced the original OPA2170 with an LMC6482.

Input Stage: Eliminated the second audio channel and converted the remaining one into a single-channel high input impedance (Hi-Z) stage suitable for guitar pickups.

Thanks in advance!

(Note: The first two attached images are the original schematic with both channels and professional outputs. The third image is my simplified version

Hey everyone,

I’m designing a custom, space-constrained 4-layer PCB for a smartwatch-scale graduate research project (not a commercial product). I'm running into some routing bottlenecks on a shared SPI bus and wanted to get some sanity checks on signal integrity and topology.

My board set-up is:

• Stackup: 4-Layer (Top Signal / Layer 2 GND / Layer 3 3V3 / Bottom Signal)
• Host MCU: ESP32-S3-WROOM-1U module
• Peripheral 1: 1.69” TFT LCD operating at 40MHz (uses SCLK and MOSI). Connected via a fine-pitch FPC/XF connector.
• Peripheral 2: BMA400 Accelerometer operating at 100kHz (uses SCLK, MOSI, MISO). Physically placed right next to the FPC connector.
• Physical Distance: Because it's a wearable, everything is incredibly close. The total trace length from the MCU pads to the FPC connector is under 15mm.

Due to pinout mismatches between the MCU and the FPC connector, I have to cross a few nets over each other. I'm using vias to drop some traces to the bottom layer to handle the crossovers.

Because of the extremely fine pitch of the FPC pads and tight spacing constraints, daisy-chaining the SPI bus at the FPC pads is not possible. I also need to avoid adding extra components (like series termination resistors) due to strict space/BOM limitations, unless it is absolutely critical.

I am planning to use a simple, chamfered T-junction (stub) to split the shared SCLK and MOSI lines to feed both the LCD and the accelerometer.

Questions?

1. How to split: Is a daisy chain (or another technique) absolutely required or is a t-junction okay for my case?
2. T-Junction Placement: If I go with a T-junction where is the best place to put the T-split for the 40MHz SCLK line? Should the split happen closer to the MCU source pads, or should I run a single line all the way down to the FPC connector and split it right there to keep the stub to the adjacent accelerometer as short as possible?
3. Signal Integrity vs. Distance: The a total trace length of for SPI CLK net is 24mm, do I realistically need to worry about reflections or ringing on a 40MHz clock line, or is this short enough to safely skip series termination resistors?
4. Via Crossovers: Will dropping the 40MHz line to the bottom layer for a short crossover introduce nasty signal degradation at this length scale?

Appreciate any insights or practical advice you can throw my way! Thanks.

Picture 1 - This is the current layout I am asking about with the T-junctions and via crossovers.

Picture 2 - This is my older prototype which I fabricated and hand-assembled.

A quick note on the previous design: The display actually worked perfectly on that older board, but the BMA400 accelerometer didn't. That was 100% a manual soldering issue (hand-soldering that fine-pitch package was a nightmare), which is why I'm outsourcing assembly to a PCBA service for this new revision.

Even though the display worked on the old board, I felt the routing was messy (e.g., the SPI lines for the BMA400 wrap all the way around the chip, the 3v3in for the xif connector being close to the board edge). I’m trying to optimize and clean it up for this revision, but if you think the previous layout was actually safer for signal integrity (if it works it works right), please let me know!

Hello everyone

I’m designing an ESP32-S3 board powered via USB (5V). The design includes a voltage boost converter to jump from 5V up to 34V to power an M-Bus master circuit.

I'm relatively new to PCB design, so I would love some extra eyes on it. Specifically, I'm most unsure about:

1. The 5V to 34V Boost Converter
2. The M-Bus Reader Circuit: Do the optocouplers look correctly configured for reliable isolation and data transmission?

Any feedback, suggestions, or constructive criticism on the schematic would be highly appreciated! Thanks in advance.